You can write as many ISR's as you have space for. However, the interrupt vector table (IVT) is a on-to-one correspondence between interrupts and ISR addresses. So when your program loads, only one address can be written into an IVT entry for any particular interrupt. No processor or interrupt controller allows more than one ISR address per interrupt.
The processor interrupt vector table is initialized by the C runtime program ("crt0") that you link with your program. Here is an example crt0 for an AVR microprocessor. As you can see, this crt0 implementation uses global symbols to assign values to the interrupt vector table entries. This means that the linker should detect the multiple ISR symbols.
Some crt0 implementations, including some for the MSP430, copy the IVT from the location of a symbol into the hardware location of the IVT, 0xFFE0 to 0xFFFE. For this type of crt0, the compiler needs to detect the multiple ISR's, because it builds the IVT and set the symbol for crt0.
Which crt0 you are using depends on the compiler configuration, unless you specifically override it, for example, in GCC by specifying a custom directory name in the GCC_EXEC_PREFIX
environment variable.