Conditional coprocessor ops in arm asm valid if coprocessor not present?

Question

Are instructions like

fstmiaxne ip!, {d8-d15}

valid/safe to use in ARM assembly when the necessary coprocessor might not be present, if the current condition codes ensure that the operation is not to be executed unless the coprocessor is present?

Answer 1

It depends on the architecture version and variant. From the ARM Architecture Reference Manual (DDI 0406B):

Conditional execution of undefined instructions

The conditional execution rules described in Conditional execution on page A8-8 apply to all instructions. This includes UNDEFINED instructions and other instructions that would cause entry to the Undefined Instruction exception.

If such an instruction fails its condition check, the behavior depends on the architecture profile and the potential cause of entry to the Undefined Instruction exception, as follows:

• In the ARMv7-A profile:

  — If the potential cause is the execution of the instruction itself and depends on data values the instruction reads, the instruction executes as a NOP and does not cause an Undefined Instruction exception.

  — If the potential cause is the execution of an earlier coprocessor instruction, or the execution of the instruction itself but does not depend on data values the instruction reads, it is IMPLEMENTATION DEFINED whether the instruction executes as a NOP or causes an Undefined Instruction exception. An implementation must handle all such cases in the same way.

• In the ARMv7-R profile, the instruction executes as a NOP and does not cause an Undefined Instruction exception.

Note

Before ARMv7, all implementations executed any instruction that failed its condition check as a NOP, even if it would otherwise have caused an Undefined Instruction exception. Undefined Instruction handlers written for these implementations might assume without checking that the undefined instruction passed its condition check. Such Undefined Instruction handlers are likely to need rewriting, to check the condition is passed, before they function correctly on all ARMv7-A implementations

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Since you're using a deprecated VFP instruction as an example, I assume you're dealing with an arch before ARMv7, so it seems you can assume it will be treated as a NOP.

Edit: for ARMv7-M (from DDI 0403D):

Conditional execution of undefined instructions

If an undefined instruction fails a condition check in ARMv7-M, the instruction behaves as a NOP and does not cause an exception.

Note

The Branch (B) instruction with a conditional field of ‘1110’ is UNDEFINED and takes an exception unless qualified by a condition check failure from an IT instruction.

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Answer 2

This site seems to have an answer:

http://www.peter-cockerell.net/aalp/html/app-a.html

Note also that if an instruction is not executed because its condition codes cause it to be ignored by the ARM, it will never be 'offered' to a co-processor, or trapped as an undefined instruction. This means that if an instruction is a 'no-operation' due to its condition code being 'never', the rest of instruction can be anything - it will never cause a trap to occur.

However I'm a bit hesitant to trust it without an authoritative source for the claim.