Is there a more efficient way of performing an arithmetic right-shift of two signed halfwords?

Question

I'm currently rewriting a portion of C code trying to take advantage of Armv6 SIMD and DSP extensions (I'm a beginner regarding ARM assembly language).

So far I've made huge gains using SMUSD and SMUADX to implement complex number multiplication. These instructions assume the real and imaginary parts of a complex number are stored on 16-bit halfwords of a single 32-bit register.

Before performing a certain complex multiply, I need to perform an arithmetic right-shift of both signed halfwords by 1 bit.

This is my current code, which I suspect is far from efficient and probably there's a much faster way. I'm concerned since this code runs in the algorithm's tightest loop, and some of the cycles gained by switching to SMUSD and SMUADX are being lost by this quirky shifting code:

mov r0, r0, asr#1  @ arithmetically shift right by 1
                   @ higher half-word is ok, lower half-word is now polluted by
                   @ the higher half-word's lowest bit becoming the sign bit
                   @ of the lower half-word

tst   r0, #0x4000  @ test if the lower-halfword was negative 
                   @ (sign bit was shifted, it is now at position 14)

orrne r0, #0x8000  @ if negative, ensure the sign bit is turned on
biceq r0, #0x8000  @ if positive, ensure the sign bit is turned off

I played around a bit with the PKHBT and PKHTB instructions with shift operations on the second operand, but they don't seem to work for signed halfwords.

Any suggestions will be greatly appreciated!

Answer 1

I think this should work:

MOV r1, #0
SHADD16 r0, r1, r0

SHADD16 is signed half word add then half the result (which is the same as ASR of 1).