Error detection in ARM and BlackFin

Question

I am studying the BlackFin Processor Programming Reference and comparing it with the ARMv7-A architecture.

I noticed that BlackFin can have certain error detection features. For example, it can generate a HARDWARE error interrupt when:

• Bus parity errors
• Internal error conditions within the core, such as Performance
  Monitor overflow
• Peripheral errors
• Bus timeout errors

Taken from pg205 BlackFin Processor Programming Reference for ADSP-BF5xx processors.

Does the ARM Archicteture have this feature?

Thank you!

Answer 1

The classical ARM architecture (aka "A&R") supports the following hardware-related exceptions:

• Undefined Instruction
• Prefetch Abort (failure to fetch an instruction)
• Data Abort (failure to read or write data)

The Cortex-M model support more granularity:

• HardFault (generic fault, not covered by other cases)
• MemManage (memory protection fault)
• BusFault (memory access fault)
• UsageFault (code-related faults: undefined instruction, invalid state etc.)

Specific chips may implement other errors. In case of non-core hardware, errors would typically be signaled as interrupts.