MIPS: J-format Instructions and Address Encoding

Question

I'm confused when it comes to encoding the address for a J-format instruction.

From Class Notes:

Assume L1 is at the address 4194340 in decimal, which is 400024 in hexadecimal. We fill the target field as an address in instructions (0x100009) rather than bytes (0x400024).

Can someone please explain to me why this is?

Answer 1

The j instruction jumps to the passed target.

However, because the instruction set is limited to 32 bits, and 6 are used for the op-code, only 26 may be used for the jump target.

This means that the distance a j instruction can travel is limited as it works by appending its target to some number of the most significant bits of the current IPC.

The MIPS instruction set could have been defined by saying that when a j instruction is encountered you add the first 6 bits of the IPC to the 26 bit target of the j instruction, but instead it was noted that instructions that a program can jump are always "word-aligned". This means that these address are always a multiple of 4 and therefore the last 2 bits of the address are always 0.

This allows us to not encode the last 2 bits in our jump target and instead encode bits 3-28. This means that to get the target of a j instruction you take the first 4 bits of the PC, add the jump target, and then add two zeros.

Hopefully with that explanation out of the way it makes sense why the target 0x400024 is encoded in the j instruction by the bits 0x100009 i.e. 0x400024 >> 2. Because the last two bits are not needed.