I am studying 8086/8080 microprocessors. The registers used in them have names,

  1. RAX
  2. RBX
  3. RCX
  4. RDX

and go on until R8 when the registers are named as R8, R9... to R15. I wanted to know

Do we also refer to the registers RAX, RBX etc as R1, R2 and so on?

有帮助吗?

解决方案

Standard practice is for the first 8 registers to keep their historical name. This convention is used in the documentation from Intel and AMD and in most assemblers.

The reason for this is that these names are mnemonic for the function of the register. For example rsp sticks out as the stack pointer; r4 not so much. The new registers, by contrast, don't have any particular function.

That being said you can always use macros to define r0-r7 as rax,rcx,rdx,rbx,rsp,rbp,rsi,rdi. For example you can get these definitions in nasm with

%use altreg

Again, this is non-standard and will make the code hard to read, both for you and others.

其他提示

First, 8086/80386/x86-64 and 8080/8085 are completely different architectures. 8080 is an 8-bit CPU and 8086 is a 16-bit one, with the 8085 extends 8080's instruction set and 80386 and x86-64 being the 32 and 64-bit extended ISAs of 8086. Being different architectures, they are not binary compatible. And if you're learning about Rxx then it's the 64-bit and not . 8086 is a CPU with the instruction set, not architecture although its instruction set might sometimes be called 8086. The architecture name is addressed as x86 in general, or occasionally x86-64

For the question, RBX is not R2. The real encoded order is AX, CX, DX, BX (See Why are first four x86 GPRs named in such unintuitive order?). And registers almost always counted from zero, so RBX should be R3, and AX, CX, DX would be R0, R1, R2 respectively. Some VIA CPUs expose the internal RISC instructions and R0-R4 are also mapped directly to EAX/ECX/EDX/EBX as expected

In nasm you can also use those numbered registers with %use altreg

5.1 altreg: Alternate Register Names

The altreg standard macro package provides alternate register names. It provides numeric register names for all registers (not just R8–R15), the Intel-defined aliases R8L–R15L for the low bytes of register (as opposed to the NASM/AMD standard names R8B–R15B), and the names R0H–R3H (by analogy with R0L–R3L) for AH, CH, DH, and BH.

https://nasm.us/doc/nasmdoc5.html

However it's not recommended to use those numbered registers, because it makes the code harder to understand to others, and you lose the mnemonic function of the names (A: accumulator, B: base, C: counter, D: data, SI: source index, DI: destination index, SP: stack pointer, BP: base pointer). It'll also require you to learn the ABI again, to know which registers to save and to pass arguments


FYI, in the registers are encoded like this

000  0    B
001  1    C
010  2    D
011  3    E
100  4    H 
101  5    L
111  7    A

not in alphabetical order either

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