Ive been to i need to understand this code in significantly more detail than the comments, can soemone help?

void vicInstallIRQhandler(pVoidFunc_t pISR, uint32_t priority,
                      uint32_t vicIntSource) {

 // store the handler address in the correct slot in the vector 

 *(&VICVECTADDR0 + vicIntSource) = (unsigned long)pISR;

 // set the priority of the interrupt for this slot

 *(&VICVECTPRIORITY0 + vicIntSource) = priority;

 // clear FIQ select bit i.e. assign this interrupt source to IRQ

 VICINTSELECT &= ~(1UL << vicIntSource);

 // enable the interrupt

 VICINTENABLE |= (1UL << vicIntSource);
}
有帮助吗?

解决方案

Actually, the comments are pretty good. However, I give a try to explain more. Overall, the function set up interrupt handler, described by a pointer to the actual service routine pISR, it's priority, and the index of the (physical) interrupt.

At your CPU, the addresses and the corresponding priorities are stored in tables with the start addresses VICVECTADDR0 and VICVECTPRIORITY0, resp. The correct table entry is found by adding the interrupt index to the base address.

VICINTSELECT and VICINTENABLE are bit vectors, where the bit addressed by the interrupt index is set and unset, resp. The semantic of VICINTSELECT is to tell the CPU that there exist a service routine for the interrupt (clear bit). The semantic of VICINTENABLE is to tell the CPU that the interrupt is not masked, i.e. enabled (set bit).

I hope my explanation helps a bit.

其他提示

@Wrekaar What makes you think it'll be verbatim? We'll probably juggle the wording around abit before we copy-paste it (jokes)

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