$^
contains all the prerequisites of the target, not just the ones that are mentioned with the rule itself. The same file can appear as a target several times in rules with no commands:
sometarget: dependency1
…
sometarget: dependency2
assemble -o $@ $^
…
sometarget: dependency3
The dependencies of sometarget
are dependency1
, dependency2
and dependency3
, and when the assemble
command is invoked by make sometarget
, it will receive all three as arguments.
Here, $^
will contain all $(CLT_OBJECT_FILES)
or $(SRV_OBJECT_FILES)
depending on which target the command is executed for.