NMAKE does not feature much string processing except substring replacement, and even this cannot perform macro expansion. However, since NMAKE supports makefile inclusion, there is an obvious technique you can exploit, albeit its implementation is somewhat complicated.
The idea is to create a temporary makefile which, by being included in a recursive invocation, performs another macro expansion round where needed. This can be used to add variable prefixes, suffixes or separators to lists of strings. Further expansion rounds can be performed likewise if necessary.
The following snippet illustrates the method. It transforms the list a b c d e
into [a];[b];[c];[d];[e]
(that is, adds a prefix, a suffix and a separator between elements). The original makefile (the rules which would be executed if NMAKE supported secondary expansion) is mostly unchanged. Finally, NMAKE leaves no temporary files behind after the entire run.
# The name of the makefile.
MAKEFILE = test.mak
# The list of strings to be processed. The elements can be separated by one or more spaces or tabs.
LIST = a b c d e
# The prefix to add to each element.
PREFIX = [
# The suffix to add to each element.
SUFFIX = ]
# The separator to add between each element.
SEP = ;
#####
# Replace tabs with spaces.
# Note: there is a hard tab character between the colon and the equal sign.
LIST = $(LIST: = )
!IFNDEF TEMPFILE
# Write a temporary makefile.
target1 target2:
@$(MAKE) /nologo /C /$(MAKEFLAGS) /F$(MAKEFILE) TEMPFILE=<< $@
LIST = $(PREFIX)$$(LIST: =$(SUFFIX)$(SEP)$(PREFIX))$(SUFFIX)
LIST = $$(LIST:$(PREFIX)$(SUFFIX)$(SEP)=)
<<NOKEEP
!ELSE
# Here goes your original makefile.
! INCLUDE $(TEMPFILE)
target1:
@echo.$@
@echo.$(LIST)
target2:
@echo.$@
@echo.$(LIST)
!ENDIF
The only caveat from this is that command-line macros are not passed to recursive invocations, and thus not much useful anymore.