How are the address of the memory and that of the register connected?(AddrConstant MIPS instruction)

Question

In my computer organization course, I came across these basic MIPS instructions:

lw   $to, AddrConstant4($s1)  //&t0 = constant 4
add  $s3, $s3, St0            //$s3 = $s3 + $t0 ($t0 == 4)

My teacher said that $s1 is a register address and the constant 4 is stored in memory.

Memory addresses and register addresses seem disconnected in my eyes.

I want to ask how does the computer get to the memory address from the register head address of $s1, or how are the address of the memory and that of the register connected?

Answer 1

lw $t, offset($s) is encoded as

1000 11ss ssst tttt iiii iiii iiii iiii

Where 100011 is the opcode, sssss is the number of the base address register, ttttt is the number of the destination register, and iiiiiiiiiiiiiiii is an immediate signed offset.

In the case of lw $t0, 4($s1) that would be:

1000 1110 0010 1000 0000 0000 0000 0100

($s1 is register $17, i.e. 10001. $t0 is register $8, i.e. 01000)

When the CPU encounters this instruction word it knows from the bit pattern that this is an lw, so it forms an effective address formed by the value of register number sssss + the immediate offset (sign-extended), loads a word from that address and stores the value in register number ttttt.

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References:
MIPS register table
MIPS instruction set reference