Makefile not generating neither object file not binary file

Question

I tried the following make script but it is neither creating any object file not any binary file what is the mistake I have done?

SRC=src
INC=inc
OBJ=obj
BIN=bin

INCS=-I$(INC)
FLAGS=-g -Wall

CC=/usr/sfw/bin/gcc

SRCS=$(wildcard $(SRC)/*.cpp)
OBJS=$(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o)

$(BIN)/out.exe: $(OBJS)
   $(CC) $(INCS) $(LIBS) $(FLAGS) $(OBJS) -o $(BIN)/out.exe

$(OBJS) : $(SRCS)
   $(CC) $(INCS) $(LIBS) $(FLAGS) -c $<

clean:
   rm -f obj/*.o bin/ussd

Below I have given the list of make tools available in my system and their version

/bin - dmake - Sun Distributed Make 7.7
/usr/bin - dmake - Sun Distributed Make 7.7
/usr/ccs/bin - make - Unknow version
/usr/sfw/bin - gmake - GNU Make 3.80
/usr/xpg4/bin - Unknow version
/usr/local/bin - make - GNU Make version 3.79.1

Answer 1

I think you have problem with make targets for the objects files.

I don't have access to a Solaris machine at the moment, but this worked at my Linux machine.

SRC=src
INC=inc
OBJ=obj
BIN=bin

INCS=-I$(INC)
FLAGS=-g -Wall

CC=/usr/sfw/bin/gcc

SRCS=$(wildcard $(SRC)/*.cpp)
OBJS=$(SRCS:$(SRC)/%.cpp=$(OBJ)/%.o)

$(BIN)/out.exe: $(OBJS)
    $(CC) $(INCS) $(LIBS) $(FLAGS) $(OBJS) -o $(BIN)/out.exe

$(OBJ)/%.o: $(SRC)/%.cpp
    $(CC) $(INCS) $(LIBS) $(FLAGS) -c $< -o $@

clean:
    rm -f obj/*.o bin/ussd