From section 5.6 "Indirect Addressing Modes" of the "TMS320C28x DSP CPU and Instruction Set Reference Guide":
*+XARn[3bit]
32bitDataAddr(31:0) = XARn + 3bit
Note: The immediate value is treated as an unsigned 3-bit value.
So it will store ACC
at the memory location pointed to by XAR4
(XAR4+0
to be specific).
When the 3-bit offset is 0 it's possible to leave it out:
The assembler also accepts ”*XARn” as an addressing mode.
This is the same encoding as the ”*+XARn[0]” mode