- You could use a critical section to have each thread have exclusive access to the data while it is updating it.
- Since your
gbl_min_dist
is a 32-bit value, if you can figure out a way to squeeze bothp1
andp2
into a single 32-bit value, you could use an approach like the custom atomics answer I gave here.
If you simply use whether or not the atomicCAS
made the first swap to condition additional code to update p1
and p2
, I think it's still possible to have a race condition that allows your data to get out of sync between thread updates.