Generate NGC for custom VHDL module in IPCore Xilinx

Question

I am trying to implement a custom IPCore for the Zedboard. In my User_Logic I am including a component (My_Module) from the VHDL module (My_Module.vhd) which I wrote as part of the ISE project. But when I come to generate the bitstream for my design in PlanAhead it asks for the My_Module.ngc as if it is treating it as a blackbox. I though the NGC was only required when using CoreGen IPCores, but it seems it also wants it for any VHDL module included as I guess this is a 'black box'.

The issue is how do I create a NGC file from the VHDL for this module, which is part of an ISE project. As I can't find any function in ISE that allows you to just generate the netlist for one VHDL module. Or can I export this module out into a separate ISE project and then synthesise it to get the .ngc?

Many thanks Sam

Answer 1

So the answer is to generate the NGC files by making the modules you want "the top module" you can then run the synthesis to generate the individual NGC. Then proceed as normal when adding IP to a PCore. So adding these NGC files to the netlist folder and modifying the BBD file and all that!

As a note for completion to get the module working you need to set the synthesis setting "Xilinx Specefic" -> and disable "add io buffers"

Answer 2

Are you sure you've typed the module name in exactly the same way both in your module .vhd file, and in the file using the module as a component?

Under normal circumstances, if your project includes the module as a .vhd file, it'll just be synthesized along with the rest of your sources - I did a quick test and renamed a component in one of my own projects, and got a complaint about a possibly missing .ngc file (this was in ISE, and not in PlanAhead though).

Answer 3

Are you including My_Module.vhd as a source file in your ISE Project? If you are, check to see that the ISE project doesn't have a yellow question mark next to the My_Module component. If it does, then it needs more information about that component. You should see a little icon with the letters VHD in it in your ISE Implementation Hierarchy View.