Getting software interrupts working in bare metal Beaglebone Black

Question

I am using CCS 5.5 to program a Beaglebone Black. I can successfully get up and running with JTAG.

I am now trying to start blinking LEDs. In order to do this I need to configure GPIO1. In trying to configure this port I have found that TI's C runtime immediately goes to user mode (4 instructions from startup). When I try reading or writing the control memory locations I get an error that we believe is caused by not being in supervisor mode.

In order to get in to supervisor mode I am attempting to write a software interrupt handler and then do the necessary configuration from there. I can write the handler, and I can get main() to call a software interrupt, but I am struggling trying to get my interrupt handler to actually work.

#pragma SWI_ALIAS(7);
int function(int i);

#pragma INTERRUPT(SWI);
int function(int i)
{
    return i + 1;
}

int main(void) {
    int i = function(5);
    while(1);
}

Calls to function produce SWI 7 in the disassembly, as I would expect, but function is never called. I have written a intvecs.asm file, but that didn't help.

    .global _c_int00
    .global _Z8functioni

    .retain ".intvecs"
    .sect ".intvecs"
    B _c_int00 ; reset interrupt
    .word 0 ; undefined instruction interrupt
    B _Z8functioni ; software interrupt
    .word 0 ; abort (prefetch) interrupt
    .word 0 ; abort (data) interrupt
    .word 0 ; reserved
    .word 0 ; IRQ interrupt
    .word 0 ; FIQ interrupt

I would appreciate any suggestions on how to get this working.

---

It appears that the .gel file that comes with CCS 5.5 doesn't actually permit writing to 0x00000000, which, to my understanding, is the location of the interrupt vectors. So the JTAG adapter isn't updating the interrupt vector.

Answer 1

I finally found in the Technical Reference Manual, in section 26.1.3.2 Public RAM Memory Map, the following paragraph:

The RAM exception vectors enable a simple means for redirecting exceptions to custom handlers. Table 26-3 shows content of the RAM space reserved for RAM vectors. The first seven addresses are ARM instructions which load the value located in the subsequent seven addresses into the PC register. Theses instructions are executed when an exception occurs since they are called from the ROM exception vectors. Undefined, SWI, Unused and FIQ exceptions are redirected to a hardcoded dead loop. Pre-fetch abort, data abort, and IRQ exception are redirected to pre-defined ROM handlers. User code can redirect any exception to a custom handler either by writing its address to the appropriate location from 4030CE24h to 4030CE3Ch or by overriding the branch (load into PC) instruction between addresses from 4030CE04h to 4030CE1Ch.

The base for the table of exception handlers on this micro is 0x4030CE24, not 0x00000000 or 0xffff0000 as indicated by the ARM manual.

Answer 2

If you are doing bare-bone programming, then you can rewrite the asm startup code to NOT enter user mode and remain in SVC mode.