Why does Feynman refer to this reversible gate as a NAND?

Question

In chapter 2 of The Pleasure of Finding Things Out, Richard P. Feynman discusses the physical limitations associated with building computers of very small size. He introduces the concept of reversible logic gates:

The great discovery of Bennett and, independently, of Fredkin is that it is possible to do computation with a different kind of fundamental gate unit, namely, a reversible gate unit. I have illustrated their idea---with a unit which I could call a reversible NAND gate.

He goes on to describe the behaviour of what he calls a reversible NAND gate:

It has three inputs and three outputs. Of the outputs, two, A' and B', are the same as two of the inputs, A and B, but the third input works this way. C' is the same as C unless A and B are both 1, in which case C it changes whatever C is. For instance, if C is 1 it is changed to 0, if C is 0 it is changed to 1---but these changes only happen if both A and B are 1.

The book contains a diagram of that reversible gate, which I've attached below (link):

The truth table of a classical, irreversible NAND gate (inputs: A, B; output: C) is as follows:

If I understand Feynman's description correctly, the truth table of what Feynman refers to as a reversible NAND gate should be as follows:

However, I don't understand why Feynman is calling his gate a NAND. How is one supposed to derive the result of NAND(A,B) with his gate? It seems to me that NAND(A,B) cannot be derived directly from any of the three outputs (A',B',C'). NAND(A,B) is given by XOR(C,C'), but that would require an additional XOR gate. So why is Feynman calling his gate a NAND gate?

Answer 1

As others have mentioned, when input C = 1, then output C' = A NAND B.

The key, however, is that no information is destroyed. Given the outputs, the inputs can be determined. Contrast this with a normal NAND gate where the input cannot be determined given only the output; information is destroyed. With the reversible NAND gate, not information is lost. No information loss is significant because theoretically there then can be no energy loss.

Answer 2

If you leave C set, then C' is A NAND B.

(I haven't read the paper, but I'm guessing that C is what makes the gate "reversible" - with C set it's a NAND gate, and with C clear it's an AND gate.)