Question

Processors these days are mostly 32 or 64 bit. This means that the instructions they process have this size.

We often hear that a 32-bit operating system is limited to 4GB=(2^32 bits) of RAM due to the fact that the length of a RAM address needs to hold inside 32 bits.

But in fact, when we look at how instructions look, you often have way less than 32 bits to load a word.

Let's take the x86 mov instruction, you have an opcode, a source and a destination address.

My question is, how can we possibly load something from a 32 bit long address?

Do we always need to have a pointer to that address in a place in memory that has a smaller address that can be used in an instruction?

Thanks

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Solution

The premise of this question is false. A processor being "x-bit" does not mean all instructions are x bits long. It can mean that, particularly on RISC architectures, which x86 is not an example of. These days on x86, an instruction can anywhere from 1 byte to 15 bytes long (the upper limit used to be lower).

So x86 has no trouble with putting addresses (or other constants) in its instructions. Plenty of space. Note, by the way, that it never needs both a source and a destination address, that is simply not encodable. At least one of them has to be a register in most instructions, and in the couple of instructions that really do have two memory addresses, the addresses are implicit.

On some other architectures, you're absolutely right: the instruction can not be long enough to accommodate a full address (because they are the same size, and that would leave no opcode bits). A common solution is offering an addressing mode that is relative to the instruction pointer, and then you can store a full address "nearby" if you need an absolute address.

OTHER TIPS

Processors these days are mostly 32 or 64 bit. This means that the instructions they process have this size.

This is untrue. The "bitness" of a processor, when referring to processors that come from the x86 family, refers to their ability of executing instructions from the AMD64/EM64T (often generalized as x86-64 or just x64) instruction set. These instructions extend the already existing instructions to work on 64-bit registers, and - generally - allow the processor to use 64-bit addresses, which widens the address space to 2^64 bytes. However, most real implementations of these CPUs don't have physical 64 address lines, although the virtual address space is still obviously 64-bit wide. Incidentally, most of the instructions still operate on 32-bit data, and 32-bit operands are the default even in x64. There is only one instruction that can take a 64-bit operand - mov.

The processors from the x86 family all have variable-size encoding of instructions. This means that every instruction's size depends on the type of the instruction, and the used operands. The same instruction can take only two bytes when operating on registers (xor eax, eax), or five bytes when specifying a full (32-bit) immediate operand (xor eax, 0xf0f0f0f0).

Processors these days are mostly 32 or 64 bit. This means that the instructions they process have this size.

This assumption is wrong for x86 because instructions can have a length of 1 byte up to 15 bytes. You can check the intel manual on how to decode an instruction.

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