Instancing a parameterized cell in Xilinx schematic

Question

I have a parameterized cell - a n-bit register, defined as:

module Register #(parameter n = 16)(
    output reg [n-1:0] OUTPUT,
    input [n-1:0] INPUT,
    input RST, EN, CLK);
// bla bla bla
endmodule

In a Xilinx Verilog Module I could instance this n bit register like so:

Register #(8) REG1 (OUT, IN, RST, EN, CLK);

(as seen here).

How do I instance this register with let's say 8 bit INPUT/OUTPUT in a Xilinx Schematic?

Answer 1

Unfortunately in Xilinx Schematics instances are fixed; therefor you cannot set parameters. Your best option would be to create a new module, possibly named Register_8bit, that sets n as a parameter in the module. Then separate sized modules can be named separately, but only the inner parameter must be changed.

module Register_8bit (
    parameter n = 8;
    output reg [n-1:0] OUTPUT,
    input [n-1:0] INPUT,
    input RST, EN, CLK);
// bla bla bla
endmodule

This allows the most reuse of code while still allowing the benefits of the top level schematic view.