Question

I'm a beginner level of student in the system architecture, to be precisely intel x86. Currently I'm reading Intel's manual (1,3a,3b,3c) and I'm stucked in segmentation part.

As far as I know, in the Protected mode, system is translating a logical memory to the linear memory ( or physical memory ) and a "far pointer" is pointing an actual linear (or physical ) memory address with 2 different parts, a segment selector and an offset.

As I learned from university, each segment registers has 16 bits portion of data, According to Intel's manual, 16bits are only the visible part of segment register, but there is more hiddnen part of segment register which unable to program or access by user. Is any chance that I could know an actual size of segment register?

Second question is about LDT , GDT , IDT register for protect mode. Are those register (LDTr,GDTr,IDTr) an actual register in cpu chipset? If it is, is any chance to access those table after boot sequence ( prevelige ring 3, user mode )?

Thank you for read my question.

PS. I tried to google it , and I couldn't find any answer. That's why I'm spending my time to write this question.

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Solution

The segment registers are 16 bits. The segment descriptors that the segment registers refer to are larger. The confusing thing is that all i386 and later processors have a small non-coherent cache of segment descriptors that correspond to the segment registers (one cached descriptor for each segment register) that is sometimes referred to as the hidden part of the segment register. It's not really part of the register, though each entry in the cache is closely associated with a specific segment register. The cache is tightly tied to the segment registers, in that whenever a segment register is written to, the corresponding cache element is updated (re-read from memory), and instructions that use a segment register use the cached descriptor corresponding to that register rather than reading the descriptor from memory.

OTHER TIPS

x86 segment registers are all 16-bit. I'm not aware of any "hidden" segment register portion. If you were unable to find anything on this via a Google search, I doubt that it exists.

For a good description of the Local Descriptor Table (LDT), the Global Descriptor Table (GDT), and the Interrupt Descriptor Table (IDT), there is a good description on Wikipedia: http://en.wikipedia.org/wiki/Intel_8086.

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