First of all, your "flag" variable should be volatile since it is shared between foreground and background code.
But to answer your question, on the Cortex-M, interrupts are already enabled inside an ISR. This is to support interrupt nesting. Inside an ISR, only interrupts of a higher priority will interrupt / preempt the current ISR. So it's very important that interrupt priorities are configured properly.
Read up on the Cortex-M family's NVIC for more information. Note that the interrupt sources, and the number of supported interrupt priorities, are dependent on the silicon vendor. In theory up to 240 external interrupts are supported, in reality it's typically much less.
There was a recent blog post about ARM Cortex M interrupt priorities that explained this in more detail.