Edit
Apparently make’s support for whitespace in inference rules depends on what variant of GNU Make you are using. It just magically works fine with Gentoo’s patched sys-devel/make-3.82-r4 (and fails with Gentoo’s make 3.81-r2). I did not notice any explanation in make-3.82’s ChangeLog or NEWS or the Gentoo patches when quickly checking them. So implicit rules working with whitespace could just be a fluke in make-3.82 itself or even from Gentoo’s patchset. Official GNU support for whitespace in targets is tracked in the still-open GNU Make bug #712.
Original misguided answer
You can use any quoting characters that your shell supports. make
ignores them when performing macro substitution and passes them directly to the shell. For example,
.SUFFIXES: .md .html
.md.html:
pandoc "$(<)" > "$(@)"
results in $ make foo\ bar.html
passing the shell pandoc "foo bar.md" > "foo bar.html"
. I decided to use the traditional style of specifying generic make
rules instead of the GNU Make extension involving %
, but you can do this with GNU Make’s %
-style rules too, I assume.
This does not solve the potential problem of the filenames containing quote characters in them. I think that, simply, most people just avoid putting "
or '
in filenames because of the likelihood of causing issues with Makefile
s or other scripts. Or you could use a GNU Makefile extension to replace the "
characdter with \"
, something that makes sh
happy (we’re going to just ignore cmd
for now because I don’t even…):
.SUFFIXES: .md .html
.md.html:
pandoc "$(subst ",\",$(<))" > "$(subst ",\",$(@))"
This was tested with a file called a"b"c.md
which succeeded in creating a"b"c.html
(disclaimer: I used discount’s markdown
command instead of pandoc).