Design an OR gate only using Demultiplexers

Question

Show the OR gate operation by only using de-multiplexers. I know it is quite impractical implementation but these types of questions are being asked in placement tests.

http://i.stack.imgur.com/mQAZD.png

check out OR gate truth table if you want from the above link

Answer 1

here is or gate implementation using demux

take 1*2 demux : input as 1 selection input as A then at 0th output of the demux: Not(A.1) = ABar

similar way BBar will get from B.

now take another 1*4 demux: input as 1 selection inputs :- ABar & BBar

then at 0th output of the demux: Not(ABar.BBar.1) = A+B

Answer 2

If you feed A&B as the inputs to a 1-4 demux, then the output that is 1 when A=0 & B=0 will be the negation of your desired OR; feed that into a 1-2 demux, and then the output that is the opposite of your input will be your OR. (Sorry I can't be more precise; not sure what naming convention you are using for your demises.)