AArch64 designers deliberately removed the STM
/LDM
instructions, presumably to simplify instruction scheduling and fault handling.
3.5 Memory Load-Store
3.5.1 Bulk TransfersThe LDM, STM, PUSH and POP instructions do not exist in A64, however bulk transfers can be constructed using the LDP and STP instructions which load and store a pair of independent registers from consecutive memory locations, and which support unaligned addresses when accessing normal memory. The LDNP and STNP instructions additionally provide a “streaming” or ”non-temporal” hint that the data does not need to be retained in caches. The PRFM (prefetch memory) instructions also include hints for “streaming” or “non-temporal” accesses, and allow targeting of a prefetch to a specific cache level.
(from ARMv8 ISA Overview)
So yes, you're supposed to use multiple STP
/LDP
instructions instead.