Question

I am trying to make PIC1 be a master and PIC2 be a slave through SPI communication. I want to send a command from PIC1 (master) to PIC2 (slave), then have it do something. However I want to establish another SPI communication from PIC2 (slave) to a digital potentiometer (MCP4241) through SPI communication as well. Will this work ?

To illustrate :

PIC1 sends 'a' ---- > PIC2 reads it

PIC2 ---- > establishes connection with digital pot(MCP4241)

PIC2 ---- > sends data to digital pot

So there will be SPI communications between PIC1 and PIC2, then PIC2 and digital pot, I just don't know if this is going to work since I would need to use the same pins. For the two PICs, I am using pic16f690.

I hope my question is clear and please if this won't work how should I fix it?

Thanks!

Was it helpful?

Solution

First of all, for an easy life, I'd recommend using a PIC with 2 SPI ports for PIC2.

However, if you are sure you want to use just one SPI port to be a master sometimes and a slave then the thing to keep in mind is that you really don't want both PICs to try to drive the serial line at the same time. You may have to write the TRIS registers to make the port tristate go high-z as well as disabling the spi peripheral.

  • If you put some series resistors in then things will be less bad if e.g. pic1 tries to drive SCLK high while pic2 is trying to drive it low then the current flowing from pic1 to pic2 will be limited

  • You could use an extra GPIO to allow pic2 to tell pic1 when it is busy. You need to have a clear idea of the flow of execution between the 2 devices so that you don't get caught with race conditions etc

  • for example you could have a flow of

  • pic1 sends 'write pot please' command to pic2
  • pic1 knows to wait for the busy signal
  • pic2 then asserts a busy signal
  • pic1 sees a busy signal and knows to now wait for it to clear before starting another spi transaction
  • pic2 does the spi transaction with the pot
  • pic2 clears busy signal
  • pic1 is sees busy signal has cleared and knows that it is ok to do spi transactions
  • pic2 will not try any spi transaction until it gets another 'write pot please'

There are loads of ways to implement something like this. The important thing is to know clearly what the flow is going to be before you start implementation

OTHER TIPS

You might want to control the pot from the master PIC1, but you must have your reasons.

It might work by doing the following:

  • Add 1k series resistor between the PIC1 and the PIC2 (MOSI, MISO, and SCLK).

  • Connect the CSpot for the digital pot also to the PIC1. By doing
    this, the PIC1 will know that the PIC2 is using the SPI bus.

  • PIC1 will only transmit SPI data when CSpot is high (inactive).

  • PIC2 will only behave as a master when the PIC1 is inactive.

The series resistors will protect the PIC1 outputs from voltage collisions from the PIC2. However, read the PIC datasheet to see if those terminals behave as HiZ when the PIC1 is not transmitting anything.

Make sure to see if the series resistors are not that big so that you SPI bandwidth gets affected.

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