You probably should mark the end of interrupt by writing the interrupt ID along with the target processor to the ICCEOIR register:
ARM Cortex-A9 Software generated interrupt only triggered once
Question
I'm working with ARM Cortex-A9 in a Zynq7020 and having problem with software generated interrupts.
When I generate (writing to the ICDSGIR register) a SGI in core ARM1 it is only triggered once and not again, more writes to ICDSGIR does not trigger the interrupt.
Generating a SGI in core ARM0 sent to ARM1 works fine but not ARM1 to ARM1.
Is there any special handling needed for SGI in the ISR? What could I have missed in the configuration?
Solution
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