PCI BAR memory addresses

Question

Quick question, I was reading the OSDev Wiki page regarding PCI and it says the following -

"Base address Registers (or BARs) can be used to hold memory addresses used by the device, or offsets for port addresses. Typically, memory address BARs need to be located in physical ram while I/O space BARs can reside at any memory address (even beyond physical memory)."

I don't get where it says memory address BARs need to be located in physical ram? The whole point of MMIO is that when it gets assigned a memory address so that it will be routed to the device and not into physical RAM. What does it mean by it needs to be located in physical RAM?

Wouldn't it just be an address between the 3GB - 4GB address space, regardless of how much physical RAM is installed?

Is this an error on the OSDev site or have I misunderstood?

link - About halfway down, under the heading Base Address Registers

Thanks.

Answer 1

The OSDev site is ok. They describe memory/IO BARS from PCI device perspective, not from host perspective. So what OSDev is saying that memory BARs can be (but not necessarily are) mapped to physical RAM on PCI device. While IO BARs are usually something else (registers, FIFO, whatever).

Please also note, that the use of IO BARs is discouraged. It is better to use only memory BARs. Usually, you will have a small memory BAR that will group all the registers. And other BARs will exposes pieces of RAM of your PCI device.