This should do it:
$(OUTDIR)$(EXECUTABLE) : $(FP_OBJ)
$(LD) $(LD_FLAGS) $^ $(LIB)
$(FP_OBJ) : $(OBJ_DIR)%.o : $(SRC_DIR)%.cpp
$(CC) $(CC_FLAGS) $@ $<
The basic problem was here:
$(OBJ) : $(SRC)
$(CC) $(CC_FLAGS)$(OBJ_DIR)$@ $(SRC_DIR)$*.cpp
Apart from the fact that $(OBJ) : $(SRC)
makes each object depend on all sources, this rule promises foo.o
and delivers objects/foo.o
. So every time through, Make saw that there was no foo.o
, and duly tried to rebuild it and the executable that required it.
There are other problems with this makefile, like the sloppy wildcards and the obnoxious practice of including slashes in the directory names, but they're not so serious.