How can I flush a file buffer in System Verilog?
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12-11-2019 - |
Question
I want to flush out a file buffer before executing $finish
in my simulation. Is there a file flush command that I can use? Or must I simply use $fclose
? I realize I can close the file in this scenario, but I'd like to know if there is a flush command for my future use.
No correct solution
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