Question

I am using Broadcom CFE(common framework enviorment) boot loader... the SOC is from Broadcom...and using Serial NOR Flash N25Q032 as a bootstrap device. To read from the flash it is using memory map technique while to write it is using SPI interface (IO mapped).

The reason behind such a design seems to me are as:

  1. IO mapped reading/writing is blocking call so while reading to keep the CPU free, it is implemented using memory mapped.

  2. It don't have an implementation to check tha... now mapped area in the RAM is modified so change the flash accordingly (means failing to implement memory mapped write) and its comparatively easy to use SPI interface (IO mapped) implementation to write the flash.

....Please explain what could be the reason behind such design....

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Solution

By definition the serial memory cannot itself be memory mapped. In this case I imagine (not having looked at the datasheet) that the NOR flash memory controller reads data into a dedicated memory mapped page in the micro-controller, so it is reading blocks serially into random-access memory.

When writing, the data is already in random-access memory, the NOR flash memory controller serializes that directly to the memory device. It would make little sense to copy it from one memory mapped area to another just to then serialize it.

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