In ATmega 128 use 16 bit timer configure it as shown below.
// Enable overflow interrupt.
TIMSK |= (1 << TOIE1);
// Enable global interrupts.
sei();
// Start timer at Fcpu/1024. Approx 3.33sec for each cycle.(F_CPU = 16MHz External)
TCCR1B |= (1 << CS12) | (1 << CS10);
So when you configure the timer like this, timer will overflow every 3.33secs and then you can define multiples of this overflow like
#define INPUT_KEY_TIMEOUT 10
just you need to check the status in the timer ISR as
if(system_timer_count == INPUT_KEY_TIMEOUT) {
//Do something if the following condition met.
}
By this you can create any time delay without disturbing controller's normal work. Only when the above condition met the controller is ready to do whatever in the ISR.
Hope this helps others.