Building an out-of-tree Linux kernel modules which share object files with exported symbols

Question

Imagine a project, which needs to build two linux kernel modules, with the following layout of sources tree:

modules/
|--common/
|  `--common_data.c
|--mod1/
|  `--mod1_main.c
`--mod2/
   `--mod2_main.c

The common_data.o object file needs to be included into both modules. So Kbuild file for this project looks something like this:

obj-m  := mod1.o mod2.o
mod1-y := mod1/mod1_main.o common/common_data.o
mod2-y := mod2/mod2_main.o common/common_data.o

It builds fine if there is not exported symbols (i.e. EXPORT_SYMBOL) in common_data.c file. But, if there are some exported symbols (e.g. some_func), then MODPOST will produce warnings like:

WARNING: mod2: 'some_func' exported twice. Previous export was in mod1.ko

This is because both modules share single Module.symvers file. It's possible to create two separate Kbuild files in mod1/ and mod2/ directories to avoid this warning, because then there will be two separate Module.symvers files. But this will lead to another issue - commond_data.o object will be built twice - first time when compiling mod1.ko and second time when compiling mod2.ko.

Are there any ways to suppress this warning when using single Kbuild file or to prevent second rebuild of common_data.o file when using two separate Kbuild files?

Answer 1

After some tinkering with Kbuild system I ended up with conclusion that a most straightforward way to handle situation like this, is to filter-out warning messages from make output in the outer makefile:

$(MAKE) -C $(KDIR) M=$$PWD 2>&1 \
| grep -v '^WARNING:.*exported twice\. Previous export was in'

or w/o sacrificing STDERR and squashing it into STDOUT, but it requires bash:

bash -c "$(MAKE) -C $(KDIR) M=$$PWD 2> >( grep -v '^WARNING:.*exported twice\. Previous export was in' )"