Registers in module Instantion

Question

aF and bF are registers.All the other signals are declared accordingly.P1,P2 . . P3 are push signals.Is this legal ? I have a lot of code to write before I can synthesize it, but I have feeling that it might not synthesize properly.

//Example ,similar to my code

always@ (posedge clk or negedge reset)
begin
    if (~reset)
    begin
        aF  =   0;
        bF  =   0;

    end
    else
    begin
        aF  = {{{WIDTH-SIZE-1}{0}},a};
        bF  = {{{WIDTH-SIZE-1}{0}},b};
    end
end



rippleadder_16bit  S0(aF[15:0],bF[15:0],c0,result1[15:0],P0,P1,c1,clk);
rippleadder_16bit  S1(aF[31:16],bF[31:16],c1,result1[31:16],P1,P2,c2,clk);
rippleadder_16bit  S2(aF[47:32],bF[47:32],c2,result1[47:32],P2,P3,c3,clk);
rippleadder_16bit  S3(aF[63:48],bF[63:48],c3,result1[63:48],P3,P4,c4,clk);*

Answer 1

just want to know if I can pass the values from a register file as indicated by aF and bF into modules rippleadder_16bit without declaring them as wires ?

Yes, that's fine to do so.