Question

I am writing a simple System C program for simulating and logic. The sensitivity list has a ,b as its members . I want to drive 0 ,1 on these lines in the main program and as per the definition of sensitivity list my and-module should run and give me the new values.

#include<systemc.h>

SC_MODULE(digital_logic)
{
  sc_in<sc_logic> a,b;
  sc_out<sc_logic> c;

  SC_CTOR(digital_logic)
  {
    SC_METHOD (process);
    sensitive << a << b;
  }

  void process()
  {
    cout << "PRINT FROM MODULE\n";
    c = a.read() & b.read();
    cout << a.read() << b.read() << c << endl;
  }

};

int sc_main(int argc , char* argv[])
{
  sc_signal<sc_logic> a_in ,b_in , c_out , c_out2;
  a_in  = SC_LOGIC_1 , b_in = SC_LOGIC_1;

  digital_logic digital_and1("digital_and1");
  digital_and1 (a_in , b_in , c_out);

  sc_start(200,SC_NS);
  cout << "PRINT FROM SC_MAIN\n";

  a_in = SC_LOGIC_1;
  cout << c_out << endl;
  b_in = SC_LOGIC_0;
  cout << c_out << endl;
  b_in = SC_LOGIC_1;
  cout << c_out << endl;

  return 0;
}

I expected that since the signals on the sensitivity list changed the outputs will also change but this the o/p. How do I change the signals in the main program so that the and gate is simulated without writing a separate testbench.

OUTPUT
PRINT FROM MODULE
11X
PRINT FROM SC_MAIN
1
1
1
Was it helpful?

Solution

You must put sc_start() between the point where you want to continue the simulation. Like following

a_in = SC_LOGIC_1;
b_in = SC_LOGIC_0;
sc_start(1,SC_NS);     // Add this
cout << c_out << endl;
b_in = SC_LOGIC_1;
sc_start(1,SC_NS);     // Add this
cout << c_out << endl;

In your original code, you just sequentially assign new value to a_in and b_in. It changes the current values of a_in and b_in, but it does not affect the current value of c_out because your program does not enter SystemC simulation kernel to simulate the change. So c_out's next value won't be changed by your a_in or b_in sensitivity list.

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