Question

I study the trap instruction but to me it makes as little sense and lookssimilar to throws exception in Java or likewse, is it similar or what does it do? It just says that the TRAP instruction always generates an exception, why would I want to do that? There is not enough info for me to understand why and where I would want to use TRAP.

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Solution 2

To understand this, you have to understand the diff between hardware and software interrupts.

Hardware Interrupts: To handle asynchronous events like IO and hardware timers, CPUs use interrupts. A hardware interrupt makes the CPU stop its current execution, save state (like registers, etc), and jump to a predefined address where a handler routine for the interrupt is located. When the handler finishes its work, the CPU resumes execution from where it stopped by restoring the saved state.

Software Interrupts aka Traps aka Exceptions: CPUs support special instructions that allow the software to simulate an interrupt. When such an instruction is executed, the CPU treats it like a hardware interrupt i.e. stops its normal flow of execution, saves its state and jumps to a handler routine. Such "traps" are used to implement many features like task scheduling, virtual memory, memory protection, debugging.....

Hope this helps.

Forgot the exception part of the question: Some programming errors (such as division by 0) are also treated by the CPU as traps, and are frequently referred to as "exceptions".

OTHER TIPS

I studied how TRAP work in PDP-11, and want to share with you:

Trap could help you with

  1. Save current the registers (including PC/PS) into stack, update SP(stack pointer)
  2. Set PC(next instrument address) to TRAP handler
  3. Set PS(status register) to TRAP status

You may refer to this image, https://github-camo.global.ssl.fastly.net/3e636f86530380760fcc784c3178d40723d55a44/687474703a2f2f696b6172697368696e6a696576612e6769746875622e696f2f756e697856362d636f64652d616e616c797a652d6368732f696d616765732f50647031315f696e737472756374696f6e5f545241502e706e67 (Sorry that I need 10 reputation to upload image...)(The chinese character in the image means "Stack")

TRAP is to provide processor-level context-switch protection, which means TRAP could save the registers, switch to run from other code address safely, and could switch back because old PC/PS was saved in stack. It's just like a function call, but not exception.

In UnixV6, TRAP is mainly used for handle hardward-interval, like clock-interval (KW11-L), power-fail-interval, etc...

I'm not sure if it could help on your issue in FPGA, just ignore me if it's not...

Thanks.

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