Actually, you have the answer there already: The best resource to find such information is in the CPU manufacturers' documentation.
If you look carefully, the The Intel manual you (almost) link to has all the information you need on your example FISTTP
: it is explicitly listed as an SSE3 instruction (see here: Vol 1, Section 5.7.1 of Intel 64 and IA-32 Architectures Software Developer’s Manual, June 2013). This implies that any CPU which supports the SSE3 instruction set, should support FISTTP
.
As far as modern instruction sets go (SSE, AVX, BMI, ..., you name it), the Intel manuals really do a good job of detailing which instruction sets (and associated CPUID
feature flags) any instruction belongs to, pretty much back to the instructions that were around when CPUID
was introduced (late 80486 CPUs). With this information, it becomes easy to figure out which CPU model supports a given instruction.
I am not sure about how well the Intel manuals would work for figuring out when really ancient things were introduced (for CPUs up to the 486 I have an old hard copy Microsoft MASM Reference manual from 1992 that details these things). But I would be surprised if this info wasn't google-able -- anyway these really old changes (like introduction of BT
instructions on the 386) are nowadays probably only interesting from an academic standpoint anyway.