Question

In Nios 2 with altera DE2 FPGA, I study the following code for interrupts

At exception: check whether trap or interrupt

exc_hand:
 rdctl et,estatus # read estatus
 andi et,et,1 # mask EPIE, bit 0
 beq et,r0,noint # om EPIE == 0: no interrupt
 rdctl et,ipending # read ipending
 beq et,r0,noint # if ipending == 0: no interrupt
int_check: # if we reach this then there aws an interrupt
 subi ea,ea,4 # adjust exception return address

I can understand the first instructions and what the mask does but I don't understand why the mask is necessary. Is it because there could be junk in the other bits than bit 0? AFAIK only bit 0 is used, so why do I need to mask it?

Was it helpful?

Solution

Refer to Table 3-8 in the NIOS II Processor Reference Handbook Programming Model - there are a whole host of bits in there which may be set. For example, the NMI bit, the shadow register bits etc...

The code you posted is only interested in the state of bit 0 (the PIE bit), so it masks off the other bits.

Licensed under: CC-BY-SA with attribution
Not affiliated with StackOverflow
scroll top