TL;DR : RAM accesses are NOT in byte sized chunks even though each byte is independently addressable(has its own address) in RAM.
The first really successful microprocessors, that took the "digital revolution" mainstream, were 8bit and hence the legacy of the basic chunk of data being 8bit continues till this day. In the first generation of microprocessors with 8bit CPUs, each byte from RAM was read/written to individually.
The next generation was developed with internal CPU registers that were larger than 8bits. They were usually multiples of 8bits(16/32/64) as this allowed them to read multiple complete bytes at once from RAM. Any attempt to read address X from RAM would result in fetching 2/4/8bytes(on 16/32/64bit CPUs) i.e. the word in RAM that contained the address X and only the appropriate byte was retained and stored into the internal CPU registers as required.
Next, with the advent of CPU-caches, RAM started being read from (and written to) in blocks of cacheline size. These are even larger than the size of the register. This would reduce the latency in reading data from RAM due to data locality.
For details, checkout this comprehensive article on CPU and memory by Ulrich Drepper.