NgdBuild:605 - logical root block 'test_bench' with type 'test_bench' is unexpanded. Symbol 'test_bench' is not supported in target 'artix7'

Question

error is NgdBuild:605 - logical root block 'test_bench' with type 'test_bench' is unexpanded. Symbol 'test_bench' is not supported in target 'artix7'. at ISE.

Please let me know why appear this error

module Processor_Top(CLK, Inst, I_addr);
  input         CLK;
  input  [31:0] Inst;
  output [31:0] I_addr;

  reg    [31:0] address;
  reg    [31:0] I_addr;

  initial address =   32'h00000000;

  always@(posedge CLK)
  begin
    $display ("%h", address);
    $display (" Fetched Instruction: %h", Inst);
    address = address + 4;
    I_addr = Inst[address];
  end

endmodule

2. Instruction Memory

module Instruction_Memory(Address, Data);
  input  [31:0] Address;
  output [31:0] Data;

  reg    [31:0] mem [0:63];

  initial begin
    $readmemh("isort.cod",mem);
  end

  assign Data = mem[Address];

endmodule

3. test_bench.v

module test_bench;

// Inputs
reg         CLK;
wire [31:0] Inst;

// Outputs
wire [31:0] I_addr;


// Instantiate the Unit Under Test (UUT)
Processor_Top uut (
  .CLK   (CLK), 
  .Inst  (Inst),  
  .I_addr(I_addr)
);

Instruction_Memory im(I_addr, Inst);
initial begin
  // Initialize Inputs
  CLK = 0;

  // Wait 100 ns for global reset to finish
  #100;

  // Add stimulus here
end

always #100
begin
  CLK<=~CLK;
end

endmodule

Answer 1

It looks fine in EDAPlayground.

I had to comment out the $readmemh("isort.cod",mem); though.

As a style guide though it is more common to write:

always begin
 #100 CLK = ~CLK;
end

It is correct to use blocking (=) assignments here. You should be using non-blocking (<=) in your edge triggered processes (always@(posedge CLK)).

To run for 100 cycles you can do some thing like the following, at present you testbench will run forever :

initial begin
  CLK = 0;

  // Wait 100 ns for global reset to finish
  //@(posedge globalreset_n);
  @(posedge CLK);

  // Add stimulus here
  repeat(100) begin
    @(posedge CLK);
  end

  $finish();
end