Question

I started to analyse the TI X-Loader, including it's makefiles. I found the following lines in the top makefile:

TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi)

and

ifeq (include/config.mk,$(wildcard include/config.mk))
...

Regarding the first line: i know that "$PWD" means the value of PWD (the working directory)
My question:
why the double dollar sign in this special case?

Regarding the second line: I'm trying to understand what is compared and why. I already red the GNU MAKE manual wildcard explanation. I'm still missing something.

My questions:
what is the "$(wildcard" for?
Which config.mk files exactly are compared to each other?
Why are they compared? (this question is more about the makefile structure)

Thanks for your help in advance.

Martin

Était-ce utile?

La solution

In make, you escape a dollar sign (so that it's not expanded by make) using two dollar signs ($$). So, if you write $PWD then make will interpret the $P as a make variable reference, which is likely not set and so empty, and the result (passed to the shell) will be WD. If you use $$PWD then the dollar sign is escaped and the result passed to the shell command will be $PWD which is what you want.

For the second line, the wildcard function will, among other things, expand to the empty string if there are no files that match the wildcard. So this invocation of wildcard is testing to see if the file include/config.mk exists or not. If it does, then the result of the function will be include/config.mk and the ifeq test will be true. If it doesn't then the result will be the empty string and the ifeq test will be false.

Nothing here is comparing the contents or timestamps or anything else of include/config.mk. This is purely a "does this file exist?" test.

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