How is it decided how much of virtual address space is mapped in page table?

Question

I have read that Arm V7 ISA gives 4gig of virtual address space for a program. If i take a program in which all the code come within 4kilobyte, my question is whether entire 4gig of space is mapped in page table? I we take short descriptor format for building page tables and use a 4k granularity, it will take a lot of space in the ram to hold the page table. So i think the whole 4GB of space for a single process is not mapped but only a part of it is mapped. Is this correct? If it is correct then how is it decided how much of the VA is mapped in the tables?

Answer 1

In ARM, the page tables have multiple levels. The first level has 4096 entries as far as I can remember - each describing a 1MB section.

From there you can break up the 1MB section into 4KB sizes (or larger - I can't remember what other sizes) by giving a pointer to a second level page table containing 256 entries describing 4KB sections.

The top level 1MB sections all have to be mapped - whether they have to be mapped to something is decided to the OS. If an area isn't needed, some OS's will just fill in the entry to page fault.

You certainly don't want to divide up the entire memory space into 4KB chunks - the page table size would be enormous.