Need help in adding more functionality to MIPS Single Cycle Datapath

Question

I am trying to add jal functionality to the following but I am stuck with how does it work. I know that it stores the old PC+4 value in the $ra register and then transfers the control to the function which transfers back the control by return $ra but how do I implement it in the hardware?

Answer 1

There are two things you need to do.

1. Add a mux at the input of the Registers so that the PC+4 value can be selected as the data to be written. With the appropriate control signal this will allow you to write PC+4 as an additional effect of the "jal $ra" instruction.
2. Implement the return "jr $ra" instruction. You will need to add a mux to the chain of logic that selects the next PC so that "read data 1" from the register file can be selected as the next PC when the instruction is "jr xxx".

Answer 2

We ad a new line that takes the PC+4 and sends it to the "Write Data" input of the register file. We need to add a multiplexer. We also need to make sure the "Write Register" field is set to the address of $RA. Register $RA is register number 31 most of the time.