Alignment network needed for loads?

Question

I came across this line - "In any case, an alignment network is needed for loads" while reading some stuff on Memory addressing in Computer Architectures and did not understand what it meant. Does anyone know what it could mean?

Answer 1

An alignment network is effectively just a shifter. The cache (or memory) read interface is typically the width of the widest single load (excluding, e.g., load multiple word instructions). E.g., a simple 32-bit processor would typically have a 32-bit wide read interface (excluding parity or ECC bits).

When a smaller value is loaded into a register, it is placed in the least signification portion of the register. Unless that value happens to be in the least significant portion of the wider value, it is necessary to shift the value. (The value is also zero or sign extended, removing any more significant bits of the value read.)