Question

Is there any SSE2 instruction to load a 128 bit int vector register from an int buffer, in reverse order ?

Était-ce utile?

La solution

It's quite easy to reverse 32 bit int elements after a normal load:

__m128i v = _mm_load_si128(buff);                    // MOVDQA
v = _mm_shuffle_epi32(v, _MM_SHUFFLE(0, 1, 2, 3));   // PSHUFD  - mask = 00 01 10 11 = 0x1b

You can do the same thing for 16 bit short elements, but it takes more instructions:

__m128i v = _mm_load_si128(buff);                    // MOVDQA
v = _mm_shuffle_epi32(v, _MM_SHUFFLE(0, 1, 2, 3));   // PSHUFD  - mask = 00 01 10 11 = 0x1b
v = _mm_shufflelo_epi16(v, _MM_SHUFFLE(2, 3, 0, 1)); // PSHUFLW - mask = 10 11 00 01 = 0xb1
v = _mm_shufflehi_epi16(v, _MM_SHUFFLE(2, 3, 0, 1)); // PSHUFHW - mask = 10 11 00 01 = 0xb1

Note that you can do this with fewer instructions using _mm_shuffle_epi8 (PSHUFB), if SSSE3 is available:

const __m128i vm = _mm_setr_epi8(14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1);
                                     // initialise vector mask for use with PSHUFB
                                     // NB: do this once, outside any processing loop
...
__m128i v = _mm_load_si128(buff);    // MOVDQA
v = _mm_shuffle_epi8(v, vm);         // PSHUFB

Autres conseils

EDIT: (The following is for single precision floating point scalars, leaving it here just in case)

The most approximate (and handy) is _mm_loadr_ps intrinsic. Be aware the address must be 16byte aligned.

Although this intrinsic translates to more than instruction (MOVAPS + shuffling).

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