Undocumented 16-bit I/O addressing on Z80

Question

I notice from the Zilog datasheet on the Z80 that with the I/O (IN and OUT) group of instructions, the contents of various registers are often placed in the top 8 bits of the address bus (depending on the instruction), with the lower 8 bits selecting one of up to 256 theoretically connected devices.

My question is what is the point of doing this with these upper 8 bits? I know some machines use this in someway related to decreasing decoding complexity, but are they seriously used for anything? I want to implement the instructions exactly as the Z80 suggests, but I don't see the point in implementing this behaviour as it is non-standard. This behaviour is described as undocumented, so on a 'Sega Master System' for example, will I get away with this? Many thanks.

Regards, Phil Potter

Answer 1

The behavior is fully documented by Zilog (pages 269-287).

I guess that some peripherials may use the upper bits A8..A15 of the address bus as a sort of 8-bit parameter.

Answer 2

Some systems use the upper 8 bits as the address and the lower 8 bits as the parameter. The Amstrad CPC is the main example. This makes OUT (C),r almost the only usable instruction, although of course it now acts actually as OUT (B),r; C is often used as the parameter for convenience. The corollary is that OUT (n),A becomes almost completely useless, unless you happen to want to send 0x34 to port 0x34, etc.

Answer 3

On ZX Spectrum the keyboard can be read only by reading from port 0xfe while the highest 8 address lines are selecting one of the 8 groups of 5 keys. For example, if you want to scan the keys Q, W, E, R, and T the upper 8 bits of the address bus have to be 0xfb:

    ld bc,#fbfe
    in a,(c)        ; reading from port 0xfe while upper 8 address lines are 0xfb

This is exactly the same as:

    ld a,#fb
    in a,(#fe)      ; reading from port 0xfe while upper 8 address lines are 0xfb

Some arcade machines from the 80s communicate with the additional hardware by outputting more than 8 bits at a time with one out instruction - the additional bits are read from the upper address lines.