How can I optimize this code with ARM NEON?

Question

I'm trying to optimize some code in order to reduce as much as possible execution times. This is the code:

    int shifter=0;

    // now iterate through all the pairings
    UINT32_ALIAS* ptr2=(UINT32_ALIAS*)ptr;
    const BriskShortPair* max=shortPairs_+noShortPairs_;
    for(BriskShortPair* iter=shortPairs_; iter<max;++iter){
        t1=*(_values+iter->i);
        t2=*(_values+iter->j);
        if(t1>t2){
            *ptr2|=((1)<<shifter);

        } // else already initialized with zero
        // take care of the iterators:
        ++shifter;
        if(shifter==32){
            shifter=0;
            ++ptr2;
        }
    }

I was wondering if it's possible to somehow parallelize this using NEON. Is it possible? Thank you

EDIT: The context of this code is the BRISK features detector (http://www.asl.ethz.ch/people/lestefan/personal/BRISK) I'm trying to optimize this code for an ARM architecture. The piece of code I'm referring to has the following structure:

-an external for cycle that scans a certain number of points

-for each one of these points there a certain number of other points around it (a fixed number) and each one of these has an intensity value associated.

-in an internal for cycle fixed pairs of points are compared on the basis of their intensity value and the result of this comparison can be 0 or 1 and this value is put in a vector.

The code I posted here is the internal for cycle.

Answer 1

EDIT : I initially misunderstood the original source code. Here is the correct version, completely rewritten. (55 cycles / iteration)

Although it's not as easy as assumed with the initial version below, NEON can handle this extremely well, resulting in an eye-popping performance boost compared to the original C implementation.

With the right tweaks, you might get additional gain in performance (less than 50 cycles / iteration). The readability will suffer heavily then though.

Have fun!

    AREA    BRISK_ASM_NEON, CODE, READNOLY
    EXPORT  yourFunction
    CODE32

yourFunction    FUNCTION

loop
    pld     [r0, #192]
    vld2.32     {q8, q9}, [r0]!
    vld2.32     {q10, q11}, [r0]!
    pld     [r0, #192]
    vld2.32     {q12, q13}, [r0]!
    vld2.32     {q14, q15}, [r0]!

    vcgt.u32    q8, q8, q9
    vcgt.u32    q9, q10, q11
    vcgt.u32    q10, q12, q13
    vcgt.u32    q11, q14, q15

    pld     [r0, #192]
    vld2.32     {q12, q13}, [r0]!
    vld2.32     {q14, q15}, [r0]!
    pld     [r0, #192]
    vld2.32     {q0, q1}, [r0]!
    vld2.32     {q2, q3}, [r0]!

    vcgt.u32    q12, q12, q13
    vcgt.u32    q13, q14, q15
    vcgt.u32    q14, q0, q1
    vcgt.u32    q15, q2, q3

    vsli.32     q8, q10, #8
    vsli.32     q9, q11, #8
    vsli.32     q8, q12, #16
    vsli.32     q9, q13, #16
    vsli.32     q8, q14, #24
    vsli.32     q9, q15, #24

    vsli.8      d16, d17, #2
    vsli.8      d18, d19, #2
    vsli.8      d16, d18, #4

    vbic.i8     d16, #0xaa
    vshr.u64    d17, d16, #31
    vorr        d16, d16, d17

    vst1.32     {d16[0]}, [r1]!

    subs        r2, r2, #32
    bgt     loop

    bx  lr

    ENDFUNC
    END

=============================================================================

!!!!!!! The code below is INVALID !!!!!!!!

=============================================================================

It's a piece of cake with NEON.

Here's your "miracle" :

prototype : void yourFunc(unsigned int * pPair, unsigned int * ptr2, unsigned int count);

    AREA    BRISK_ASM_NEON, CODE, READNOLY
    EXPORT  yourFunction
    CODE32

yourFunction    FUNCTION
    adr r12, shifter_table
    vpush   {q4-q7}
    vldmia  r12, {q0-q7}

loop
    vld1.32 {q8, q9}, [r1]
    vorr    q10, q8, q0
    vorr    q11, q9, q1
    vld2.32 {q12, q13}, [r0]!
    vld2.32 {q14, q15}, [r0]!
    vcgt.u32    q12, q12, q13
    vcgt.u32    q13, q14, q15
    vbsl    q12, q10, q8
    vbsl    q13, q11, q9
    vst1.32 {q12, q13}, [r1]!

    vld1.32 {q8, q9}, [r1]
    vorr    q10, q8, q2
    vorr    q11, q9, q3
    vld2.32 {q12, q13}, [r0]!
    vld2.32 {q14, q15}, [r0]!
    vcgt.u32    q12, q12, q13
    vcgt.u32    q13, q14, q15
    vbsl    q12, q10, q8
    vbsl    q13, q11, q9
    vst1.32 {q12, q13}, [r1]!

    vld1.32 {q8, q9}, [r1]
    vorr    q10, q8, q4
    vorr    q11, q9, q5
    vld2.32 {q12, q13}, [r0]!
    vld2.32 {q14, q15}, [r0]!
    vcgt.u32    q12, q12, q13
    vcgt.u32    q13, q14, q15
    vbsl    q12, q10, q8
    vbsl    q13, q11, q9
    vst1.32 {q12, q13}, [r1]!

    vld1.32 {q8, q9}, [r1]
    vorr    q10, q8, q6
    vorr    q11, q9, q7
    vld2.32 {q12, q13}, [r0]!
    vld2.32 {q14, q15}, [r0]!
    vcgt.u32    q12, q12, q13
    vcgt.u32    q13, q14, q15
    vbsl    q12, q10, q8
    vbsl    q13, q11, q9
    vst1.32 {q12, q13}, [r1]!

    subs    r2, #32
    bgt loop

    vpop    {q4-q7}
    bx  lr

    ENDFUNC

shifter_table
    DCD (1<<00), (1<<01), (1<<02), (1<<03), (1<<04), (1<<05), (1<<06), (1<<07), (1<<08), (1<<09), (1<<10), (1<<11), (1<<12), (1<<13), (1<<14), (1<<15)
    DCD (1<<16), (1<<17), (1<<18), (1<<19), (1<<20), (1<<21), (1<<22), (1<<23), (1<<24), (1<<25), (1<<26), (1<<27), (1<<28), (1<<29), (1<<30), (1<<31)

    END

The code above is just moderately optimized (interlocks here and there), and works only if count is a multiple of 32.

That's as far as I go managing readability and when working "unprofessionally".

47 cycles / iteration isn't bad. The rest is up to you.

Good luck!