Looking for UCSRnA in http://upcommons.upc.edu/pfc/bitstream/2099.1/10997/4/Annex3.pdf that code simply waits until bit 7 ("RXCn: USART Receive Complete") in USCR1A is off.
That document says about bit 7 This flag bit is set when there are unread data in the receive buffer and cleared when the receive buffer is empty.
(1<<RXC)
is the numerical value of bit 7. A bitwise AND (the &
) between it and the value read from UCSR1A results in 0 (if the bit is off) or (1<<RXC)
(if the bit is on). Since (1<<7) is 128 and that is not zero, the loop will be entered when the bit is set.