half-carry/half-borrow flag in DAA instruction

Question

Apologies for making this my second Z80 DAA question - I have pretty much implemented this instruction now, but there is one thing I'm not sure about - is the H flag set by this instruction at all? The Z80 manual says 'see instruction', but it only mentions the flag before DAA, not after it is executed.

I set the flags as follows:

S is set if result is negative (0x80 & result equals 0x80) Z is set if result is zero H (not sure hence this question) P/V is set to the parity of the result (1 if even, 0 if odd) N is left alone C is set if the higher nibble of the original accumulator value is modified

Other than this, the instruction seems to perform as I expect it to :-) I hope someone can clear this up for me, many thanks.

Answer 1

It's a good question. Yes, H flag's behaviour is not clearly documented because it is behaviour is non-standard with DAA.

If lower nibble (least significant four bits) of A is a non base-10 number (greater than 9 like A,B,C,D,E or F) or H flag is set, 6 is added to the register. This means even if lower nibble is in 0-9 range, you can force to add 6 to A register by setting H flag.

When it comes to your question, H flag usually remains untouched in my experience but you cannot depend on that because it is said that "the effect is non-standard" which means H flag may change or may not change depending on the situation. In cases like this, you should always think H flag is affected by the DAA instruction after execution even if you see it is not affected in your tests.

Answer 2

I could only find here that the half-carry/borrow flag is modified by DAA.

I recommend that this flag be set exactly as the AF (auxiliary carry) flag is set by the DAA and DAS instructions on x86 CPUs. I see no reason why there should be any difference in operation between i8080/i8085/Z80's and i8086's DAA/DAS.

The x86 DAA/DAS sets AF to 1 if it adjusts the lowest 4 bits of the accumulator by 6. If it does not adjust them, it resets AF to 0.

See the pseudo-code for DAA and DAS in the intel's (or AMD's) x86 CPU manuals.