Reading different data on a single line from file in VHDL

Question

Supposing I've got a file filled with data separated by a tabulation (in this format):

1   2
3   4
5   6

and I'd like to read these data in pairs from a single line, so that result would be as follows:

var1=1;
var2=2;
var1=3;
var2=4;
var1=5;
var2=6;

How am I supposed to work? Right now my code works for a single data on a single line (see following):

read_from_file: process(clk)
  variable input_data: natural;
  variable ILine: line;
begin
  for i in 0 to NSAMPLES-1 loop
    readline (input_vectors, ILine);
    read(ILine, input_data);
  end loop;
end process;

Thank you for helping!

Answer 1

You should be able to call the read function again. For example:

read_from_file: process(clk)
  variable input_data_column1: natural;
  variable input_data_column2: natural;
  variable ILine: line;
begin
  for i in 0 to NSAMPLES-1 loop
    readline (input_vectors, ILine);
    read(ILine, input_data_column1);
    read(ILine, input_data_column2);
    -- Now you can do things like conv_std_logic_vector(input_data_column1, bitwidth) etc
  end loop;
end process;

Note: I am not positive if any whitespace will be accepted. Spaces have worked for me.