In what CPUs and OS can we distribute hardware interrupts across CPU-cores?

Question

In what CPUs and OS(operations systems) can we distribute hardware interrupts across CPU-cores for sequential arising it on different cores, for example interrupts from the network adapters?

As there have said, we can't do it in Linux(x86_64): Is it possible to use the hardware de-multiplexing for highload network servers?

But an example we can do it in Cortex-A5 MPCore: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0434b/CCHDBEBE.html

Answer 1

Take a look at the irqbalance linux utility :

https://github.com/Irqbalance/irqbalance

I recently ported to ARM Cortex A9 based platform.

The hardware interrupts gets routed to different cores.