Snake game using FPGA (ALTERA)

Question 1

Let's say you have a LED matrix like this: LED matrix schematic

To answer not your question, but your comment about " if u can at least show me how to make the blinking LED i will be grateful :)", we can do as this:

module blink (input wire clk,  /* assuming a 50MHz clock in your trainer */
              output wire anode,  /* to be connected to RC7 */
              output wire cathode);  /* to be connected to RB7 */

  reg [24:0] freqdiv = 25'h0000000;
  always @(posedge clk)
    freqdiv <= freqdiv + 1;
  assign cathode = 1'b0;
  assign anode = freqdiv[24];
endmodule

This will make the top left LED to blink at a rate of 1,4 blinks per second aproximately.

This other example will show a running dot across the matrix, left to right, top to down:

module runningdot (input wire clk,  /* assuming a 50MHz clock in your trainer */
       output wire [7:0] anodes,  /* to be connected to RC0-7 */
       output wire [7:0] cathodes);  /* to be connected to RB0-7 */

  reg [23:0] freqdiv = 24'h0000000;
  always @(posedge clk)
    freqdiv <= freqdiv + 1;
  wire clkled = freqdiv[23];

  reg [7:0] r_anodes = 8'b10000000;
  reg [7:0] r_cathodes = 8'b01111111;
  assign anodes = r_anodes;
  assign cathodes = r_cathodes;

  always @(posedge clkled) begin
    r_anodes <= {r_anodes[0], r_anodes[7:1]};  /* shifts LED left to right */
    if (r_anodes == 8'b00000001)  /* when the last LED in a row is selected... */
      r_cathodes <= {r_cathodes[0], r_cathodes[7:1]}; /* ...go to the next row */
  end
endmodule

Your snake game, if using logic and not an embedded processor, is way much complicated than these examples, but it will use the same logic principles to drive the matrix.

Question 2

You'll have choose between 2 implementation routes:

Using a soft processor (NIOS II)
Writing the game logic in a hardware description language ([System]Verilog or VHDL)

The former will likely be the fastest route to achieving the completed game assuming you have some software background already, however if your intention is to learn to use FPGAs then option 2 may be more beneficial. If you use a NIOS or other soft processor core you'll still need to create an FPGA image and interface to external peripherals.

To get started you'll want to look at some of the example designs that come with your board. You also need to fully understand the underlying physical interface to the LED Matrix display to determine how to drive it. You then want to start partitioning your design into sensible blocks - a block to drive the display, a block to handle user input, storage of state, the game logic itself etc. Try and break them down sufficiently to decide what the interfaces to communicate between the blocks are going to look like.

In terms of implementation, for option 1 you will probably make use of Altera's SoC development environment called Qsys. Again working from an existing example design as a starting point is probably the easiest way to get up-and-running quickly. With option 2 you need to pick a hardware description language ([System]Verilog or VHDL or MyHDL) and code away in your favourite editor.

When you start writing RTL code you'll need a mechanism to simulate it. I'd suggest writing block-level simulations for each of the blocks you write (ideally writing the tests based on your definitions of the interfaces before writing the RTL). Assuming you're on a budget you don't have many options: Altera bundles a free version of Modelsim with their Quartus tool, there's the open source options of the Icarus simulator if using verilog or GHDL for VHDL.

When each block largely works run it through the synthesis tool to check FPGA resource utilisation and timing closure (the maximum frequency the design can be clocked at). You probably don't care too much about the frequency implementing a game like snake but it's still good practice to be aware of how what you write translates into an FPGA implementation and the impact on timing.

You'll need to create a Quartus project to generate an FPGA bitfile - again working from an existing example design is the way to go. This will provide pin locations and clock input frequencies etc. You may need to write timing constraints to define the timing to your LED Matrix display depending on the interface.

Then all you have to do is figure out why it works in simulation but not on the FPGA ;)